From Schematic to Silicon
I'm a recent electrical engineering graduate passionate about semiconductor technology and integrated circuit design. My experience spans the complete IC development cycle, from initial schematic capture through physical layout to actual chip fabrication and testing.
During my academic career, I've worked extensively with industry-standard tools like Cadence Virtuoso, performing full-custom CMOS design, DRC/LVS verification, and wafer-level validation. I've designed and optimized operational amplifiers for modern process nodes, implemented digital logic blocks, and conducted comprehensive PVT corner analysis to ensure robust performance.
My hands-on experience with semiconductor fabrication and testing sets me apart. I've used probe stations, semiconductor analyzers, and oscilloscopes to validate fabricated chips against simulations, giving me practical insight into the challenges of translating designs from simulation to silicon.
I'm seeking opportunities at semiconductor companies where I can contribute to analog/mixed-signal IC design, VLSI development, or process technology teams. I'm eager to apply my academic foundation and hands-on fabrication experience to help develop cutting-edge semiconductor solutions.
IC Design & Layout
- Cadence Virtuoso
- Full-Custom CMOS
- Analog Layout
- DRC/LVS Verification
- Parasitic Extraction
- Multi-Finger Devices
Circuit Design
- Op-Amp Design
- Digital Logic Blocks
- PVT Corner Analysis
- SPICE Simulation
- Mixed-Signal Design
- Power Optimization
Fabrication & Test
- Wafer Testing
- Probe Station Operation
- Semiconductor Analysis
- Oscilloscope Validation
- Design-to-Silicon
- Yield Analysis
Embedded Systems
- Arduino/Microcontrollers
- RF Communication
- Sensor Integration
- Motor Control PWM
- PCB Design
- Prototyping
